|
|
Макроопределения |
|
#define |
wdt_reset() __asm__
__volatile__ ("wdr") |
_WD_PS3_MASK 0x00 |
|
_WD_CONTROL_REG WDTCR |
|
_WD_CHANGE_BIT WDCE |
|
#define |
_wdt_write(value) |
#define |
|
#define |
wdt_enable(timeout) _wdt_write(timeout) |
#define |
|
#define |
|
#define |
|
#define |
|
#define |
|
#define |
|
#define |
WDTO_1S 6 |
#define |
WDTO_2S 7 |
#define |
WDTO_4S 8 |
#define |
WDTO_8S 9 |
Value:
__asm__ __volatile__ ( \
"in __tmp_reg__,__SREG__" "\n\t" \
"cli" "\n\t" \
"wdr" "\n\t" \
"out %0,%1" "\n\t" \
"out __SREG__,__tmp_reg__" "\n\t" \
"out %0,%2" \
: /* no outputs */ \
: "I" (_SFR_IO_ADDR(_WD_CONTROL_REG)), \
"r" (_BV(_WD_CHANGE_BIT) | _BV(WDE)), \
"r" ((uint8_t) ((value & 0x08 ? _WD_PS3_MASK : 0x00) | \
_BV(WDE) | (value & 0x07)) ) \
: "r0" \
)
Automatically generated by Doxygen 1.5.2 on 21
Dec 2007.